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      System Level Design from HW/SW to Memory for Embedded Systems 

      Bit-Precise Formal Verification for SystemC Using Satisfiability Modulo Theories Solving

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      Springer International Publishing

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          Most cited references 12

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          A Tool for Checking ANSI-C Programs

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            Checking Safety Properties Using Induction and a SAT-Solver

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              Boolector: An Efficient SMT Solver for Bit-Vectors and Arrays

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                Author and book information

                Book
                978-3-319-90022-3
                978-3-319-90023-0
                2017
                10.1007/978-3-319-90023-0

                http://www.springer.com/tdm

                Book Chapter
                2017
                April 17 2018
                : 51-63
                10.1007/978-3-319-90023-0_5

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