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      Single-layer MoS2 transistors.

      Nature nanotechnology
      Disulfides, chemistry, Equipment Design, Graphite, Microscopy, Atomic Force, methods, Molybdenum, Nanostructures, Nanotechnology, instrumentation, Nanotubes, Carbon, Semiconductors, Silicon, Silicon Dioxide, Surface Properties, Temperature, Transistors, Electronic

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          Abstract

          Two-dimensional materials are attractive for use in next-generation nanoelectronic devices because, compared to one-dimensional materials, it is relatively easy to fabricate complex structures from them. The most widely studied two-dimensional material is graphene, both because of its rich physics and its high mobility. However, pristine graphene does not have a bandgap, a property that is essential for many applications, including transistors. Engineering a graphene bandgap increases fabrication complexity and either reduces mobilities to the level of strained silicon films or requires high voltages. Although single layers of MoS(2) have a large intrinsic bandgap of 1.8 eV (ref. 16), previously reported mobilities in the 0.5-3 cm(2) V(-1) s(-1) range are too low for practical devices. Here, we use a halfnium oxide gate dielectric to demonstrate a room-temperature single-layer MoS(2) mobility of at least 200 cm(2) V(-1) s(-1), similar to that of graphene nanoribbons, and demonstrate transistors with room-temperature current on/off ratios of 1 × 10(8) and ultralow standby power dissipation. Because monolayer MoS(2) has a direct bandgap, it can be used to construct interband tunnel FETs, which offer lower power consumption than classical transistors. Monolayer MoS(2) could also complement graphene in applications that require thin transparent semiconductors, such as optoelectronics and energy harvesting.

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          Most cited references23

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          Emerging photoluminescence in monolayer MoS2.

          Novel physical phenomena can emerge in low-dimensional nanomaterials. Bulk MoS(2), a prototypical metal dichalcogenide, is an indirect bandgap semiconductor with negligible photoluminescence. When the MoS(2) crystal is thinned to monolayer, however, a strong photoluminescence emerges, indicating an indirect to direct bandgap transition in this d-electron system. This observation shows that quantum confinement in layered d-electron materials like MoS(2) provides new opportunities for engineering the electronic structure of matter at the nanoscale.
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            Energy Band-Gap Engineering of Graphene Nanoribbons

            We investigate electronic transport in lithographically patterned graphene ribbon structures where the lateral confinement of charge carriers creates an energy gap near the charge neutrality point. Individual graphene layers are contacted with metal electrodes and patterned into ribbons of varying widths and different crystallographic orientations. The temperature dependent conductance measurements show larger energy gaps opening for narrower ribbons. The sizes of these energy gaps are investigated by measuring the conductance in the nonlinear response regime at low temperatures. We find that the energy gap scales inversely with the ribbon width, thus demonstrating the ability to engineer the band gap of graphene nanostructures by lithographic processes.
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              High-speed graphene transistors with a self-aligned nanowire gate.

              Graphene has attracted considerable interest as a potential new electronic material. With its high carrier mobility, graphene is of particular interest for ultrahigh-speed radio-frequency electronics. However, conventional device fabrication processes cannot readily be applied to produce high-speed graphene transistors because they often introduce significant defects into the monolayer of carbon lattices and severely degrade the device performance. Here we report an approach to the fabrication of high-speed graphene transistors with a self-aligned nanowire gate to prevent such degradation. A Co(2)Si-Al(2)O(3) core-shell nanowire is used as the gate, with the source and drain electrodes defined through a self-alignment process and the channel length defined by the nanowire diameter. The physical assembly of the nanowire gate preserves the high carrier mobility in graphene, and the self-alignment process ensures that the edges of the source, drain and gate electrodes are automatically and precisely positioned so that no overlapping or significant gaps exist between these electrodes, thus minimizing access resistance. It therefore allows for transistor performance not previously possible. Graphene transistors with a channel length as low as 140 nm have been fabricated with the highest scaled on-current (3.32 mA μm(-1)) and transconductance (1.27 mS μm(-1)) reported so far. Significantly, on-chip microwave measurements demonstrate that the self-aligned devices have a high intrinsic cut-off (transit) frequency of f(T) = 100-300 GHz, with the extrinsic f(T) (in the range of a few gigahertz) largely limited by parasitic pad capacitance. The reported intrinsic f(T) of the graphene transistors is comparable to that of the very best high-electron-mobility transistors with similar gate lengths.
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