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      An ultra-low on-resistance power MOSFET fabricated by using a fully self-aligned process

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          Anisotropic plasma etching of polysilicon

          C. J. Mogab, H. Levinstein (1980)
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            Modeling of the on-resistance of LDMOS, VDMOS, and VMOS power transistors

            S.C. Sun, J.D. Plummer (1980)
            Article 0 comments Cited 24 times – based on 0 reviews     Review now
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              A new vertical power MOSFET structure with extremely reduced on-resistance

              H Takagi, G. Kano, D Ueda (1985)
              Article 0 comments Cited 13 times – based on 0 reviews     Review now
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                Author and article information

                Journal
                Title: IEEE Transactions on Electron Devices
                Abbreviated Title: IEEE Trans. Electron Devices
                Publisher: Institute of Electrical and Electronics Engineers (IEEE)
                ISSN (Print): 0018-9383
                Publication date Created: April 1987
                Publication date (Print): April 1987
                Volume: 34
                Issue: 4
                Pages: 926-930
                Article
                DOI: 10.1109/T-ED.1987.23017
                SO-VID: 2088c985-997a-42c9-b04e-bdbd4440712a
                Copyright © © 1987
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