NANO-phase SBT-family ferroelectric memories

In the past year it has become possible to fabricate ferroelectric thin-film memories onto standard silicon integrated circuits that combine very high speed (30-nanosecond read/erase/rewrite operation), 5-volt standard silicon logic levels, very high density (2 by 2 micrometer cell size), complete nonvolatility (no standby power required), and extreme radiation hardness. These ferroelectric random-access memories are expected to replace magnetic core memory, magnetic bubble memory systems, and electrically erasable read-only memory for many applications. The switching kinetics of these films, 100 to 300 nanometers thick, are now well understood, with switching times that fit an activation field dependence that scales applied field and temperature. Earlier problems of fatigue and retention failure are also now understood and have been improved to acceptable levels.