Multi-gate organic neuron transistors for spatiotemporal information processing

Changing the strength of connections between neurons is widely assumed to be the mechanism by which memory traces are encoded and stored in the central nervous system. In its most general form, the synaptic plasticity and memory hypothesis states that "activity-dependent synaptic plasticity is induced at appropriate synapses during memory formation and is both necessary and sufficient for the information storage underlying the type of memory mediated by the brain area in which that plasticity is observed." We outline a set of criteria by which this hypothesis can be judged and describe a range of experimental strategies used to investigate it. We review both classical and newly discovered properties of synaptic plasticity and stress the importance of the neural architecture and synaptic learning rules of the network in which it is embedded. The greater part of the article focuses on types of memory mediated by the hippocampus, amygdala, and cortex. We conclude that a wealth of data supports the notion that synaptic plasticity is necessary for learning and memory, but that little data currently supports the notion of sufficiency.

Homeostatic synaptic scaling is a form of synaptic plasticity that adjusts the strength of all of a neuron's excitatory synapses up or down to stabilize firing. Current evidence suggests that neurons detect changes in their own firing rates through a set of calcium-dependent sensors that then regulate receptor trafficking to increase or decrease the accumulation of glutamate receptors at synaptic sites. Additional mechanisms may allow local or network-wide changes in activity to be sensed through parallel pathways, generating a nested set of homeostatic mechanisms that operate over different temporal and spatial scales.

In this paper, the recent progress of synaptic electronics is reviewed. The basics of biological synaptic plasticity and learning are described. The material properties and electrical switching characteristics of a variety of synaptic devices are discussed, with a focus on the use of synaptic devices for neuromorphic or brain-inspired computing. Performance metrics desirable for large-scale implementations of synaptic devices are illustrated. A review of recent work on targeted computing applications with synaptic devices is presented.