Method and Implementation of High-speed Digital Sampling Technology Based on Impulse Radar Signal

Abstract

A High-speed digital sampling technology suitable for periodical impulse radar signal is proposed in this paper. One bit high-speed quantize is constructed by differential comparator in FPGA. Time-interleaved digital sampling and buffer encoding are used to one bit stream based on the internal multi-phase clock of FPGA, to achieve sampling rate higher than 1 GHz. High speed digital sampling is realized by the accumulation of one bit sampling data with different comparison levels. An 8 bit, 1.6 GHz ADC based on the proposed method is realized on XC2V3000 Xilinx’s FPGA, which is successfully applied in GPR. The proposed method has the advantages of low cost and power consumption as compared with real sampling, and exhibits higher efficiency as compared with equivalent sampling.