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      Architecture Support for FPGA Multi-tenancy in the Cloud

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          Abstract

          Cloud deployments now increasingly provision FPGA accelerators as part of virtual instances. While FPGAs are still essentially single-tenant, the growing demand for hardware acceleration will inevitably lead to the need for methods and architectures supporting FPGA multi-tenancy. In this paper, we propose an architecture supporting space-sharing of FPGA devices among multiple tenants in the cloud. The proposed architecture implements a network-on-chip (NoC) designed for fast data movement and low hardware footprint. Prototyping the proposed architecture on a Xilinx Virtex Ultrascale+ demonstrated near specification maximum frequency for on-chip data movement and high throughput in virtual instance access to hardware accelerators. We demonstrate similar performance compared to single-tenant deployment while increasing FPGA utilization ( we achieved 6x higher FPGA utilization with our case study), which is one of the major goals of virtualization. Overall, our NoC interconnect achieved about 2x higher maximum frequency than the state-of-the-art and a bandwidth of 25.6 Gbps.

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          Author and article information

          Journal
          14 June 2020
          Article
          2006.08026
          71ec5d88-c305-48e9-8f9d-485bd1793023

          http://arxiv.org/licenses/nonexclusive-distrib/1.0/

          History
          Custom metadata
          This paper was accepted as a full-paper (8pages) at the 31st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2020)
          cs.AR

          Hardware architecture
          Hardware architecture

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