Logical Majorana fermions for fault-tolerant quantum simulation

Abstract

We show how to absorb fermionic quantum simulation's expensive fermion-to-qubit mapping overhead into the overhead already incurred by surface-code-based fault-tolerant quantum computing. The key idea is to process information in surface-code twist defects, which behave like logical Majorana fermions. Our approach implements a universal set of fault-tolerant gates on these logical Majorana fermions by effecting encoded measurement-based topological quantum computing with them. A critical feature of our approach is the use of code deformations between logical tetron and logical hexon surface-code-patch encodings, which enables one to move beyond the limitations of a wholly square-patch tetronic surface-code approach. To motivate near-term implementations, we also show how one could realize each of a universal set of logical Majorana gates on a small-scale testbed using noisy intermediate scale quantum (NISQ) technology on as few as 13 qubits.