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      Validating time-constrained systems using UML Statecharts Patterns and Timed Automata Observers

      1 , 1 , 2

      Third International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2009) (VECOS)

      Verification and Evaluation of Computer and Communication Systems (VECoS 2009)

      2-3 July 2009

      UML Statecharts, Timed Automata, Patterns observers, model-checking, time-constrained system

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          There is no author summary for this article yet. Authors can add summaries to their articles on ScienceOpen to make them more accessible to a non-specialist audience.

          Abstract

          The work presented in this paper is part of a project that aims to develop of a new approach to time-constrained system verification based on UML. In fact, being relatively easy to learn and use, UML is very popular, unlike formal methods. Nevertheless, formal models provide developers with several advantages: they can be used for activities, such as properties verification, which are crucial for critical system development. Such activities are less effective when carried out on UML models. Also, because UML semantics is informal, the automatic verification of UML models is directly unfeasible. In this paper, we propose a new verification approach that takes advantage of UML Statecharts model to implement a new technique based on both Timed Automata Observers and model checking. The contributions of the paper are the definition of new time constraints (properties) taxonomy and the definition of a Statecharts patterns’ base. These patterns are then translated to Timed Automata Observers. The obtained observers are synchronized with the system specification, thus reducing the verification task to a reachability analysis.

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          Most cited references 14

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          The model checker SPIN

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            Towards a general theory of action and time

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                Author and article information

                Contributors
                Conference
                July 2009
                July 2009
                : 1-13
                Affiliations
                [ 1 ]ESTAS, INRETS, 20 rue Elisée Reclus BP 317, Villeneuve d’Ascq, 59666, France
                [ 2 ]LAGIS, Ecole Centrale de Lille BP 48, Villeneuve d’Ascq, 59651, France
                Article
                10.14236/ewic/VECOS2009.11
                © Ahmed MEKKI et al. Published by BCS Learning and Development Ltd. Third International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2009), Rabat, Morroco

                This work is licensed under a Creative Commons Attribution 4.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/

                Third International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2009)
                VECOS
                3
                Rabat, Morroco
                2-3 July 2009
                Electronic Workshops in Computing (eWiC)
                Verification and Evaluation of Computer and Communication Systems (VECoS 2009)
                Product
                Product Information: 1477-9358BCS Learning & Development
                Self URI (journal page): https://ewic.bcs.org/
                Categories
                Electronic Workshops in Computing

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