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Kinetic surface roughening and wafer bow control in heteroepitaxial growth of 3C-SiC on Si(111) substrates

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      Abstract

      A thin, chemically inert 3C-SiC layer between GaN and Si helps not only to avoid the “melt-back” effect, but also to inhibit the crack generation in the grown GaN layers. The quality of GaN layer is heavily dependent on the unique properties of the available 3C-SiC/Si templates. In this paper, the parameters influencing the roughness, crystalline quality, and wafer bow are investigated and engineered to obtain high quality, low roughness 3C-SiC/Si templates suitable for subsequent GaN growth and device processing. Kinetic surface roughening and SiC growth mechanisms, which depend on both deposition temperature and off-cut angle, are reported for heteroepitaxial growth of 3C-SiC on Si substrates. The narrower terrace width on 4° off-axis Si enhances the step-flow growth at 1200 °C, with the roughness of 3C-SiC remaining constant with increasing thickness, corresponding to a scaling exponent of zero. Crack-free 3C-SiC grown on 150-mm Si substrate with a wafer bow of less than 20 μm was achieved. Both concave and convex wafer bow can be obtained by in situ tuning of the deposited SiC layer thicknesses. The 3C-SiC grown on off-axis Si, compared to that grown on on-axis Si, has lower surface roughness, better crystallinity, and smaller bow magnitude.

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      Most cited references 2

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      Stable and unstable growth in molecular beam epitaxy.

      (1994)
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        Graphene synthesis on cubic SiC/Si wafers. perspectives for mass production of graphene-based electronic devices.

        The outstanding properties of graphene, a single graphite layer, render it a top candidate for substituting silicon in future electronic devices. The so far exploited synthesis approaches, however, require conditions typically achieved in specialized laboratories and result in graphene sheets whose electronic properties are often altered by interactions with substrate materials. The development of graphene-based technologies requires an economical fabrication method compatible with mass production. Here we demonstrate for the fist time the feasibility of graphene synthesis on commercially available cubic SiC/Si substrates of >300 mm in diameter, which result in graphene flakes electronically decoupled from the substrate. After optimization of the preparation procedure, the proposed synthesis method can represent a further big step toward graphene-based electronic technologies.
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          Author and article information

          Affiliations
          [1 ]Queensland Micro- and Nanotechnology Centre, Griffith University , Nathan, QLD, 4111, Australia
          [2 ]Bluglass Ltd. , 74 Asquith Street, Silverwater, NSW, 2128, Australia
          Author notes
          Journal
          Sci Rep
          Sci Rep
          Scientific Reports
          Nature Publishing Group
          2045-2322
          21 October 2015
          2015
          : 5
          26487465
          4614071
          srep15423
          10.1038/srep15423
          Copyright © 2015, Macmillan Publishers Limited

          This work is licensed under a Creative Commons Attribution 4.0 International License. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in the credit line; if the material is not included under the Creative Commons license, users will need to obtain permission from the license holder to reproduce the material. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/

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