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Development of a single photon avalanche diode (SPAD) array in high voltage CMOS 0.8 μm dedicated to a 3D integrated circuit (3DIC)
Author(s):
B.-L. Berube
,
V.-P. Rhéaume
,
A.C. Therrien
,
S Parent
,
L. Maurais
,
A Boisvert
,
G. CARINI
,
S.A. Charlebois
,
R. Fontaine
,
J.F. Pratte
Publication date:
Journal:
Proceedings of the Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2012 IEEE
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