A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC

Han, Haolin; Liu, Shubin; Liang, Hongzhi; Shen, Yi; Guo, Jianyu; Ren, Ruili; Zhu, Zhangming

doi:10.1109/TCSI.2024.3354995

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A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC

Author(s): Haolin Han ¹ , Shubin Liu ¹ , Hongzhi Liang ¹ , Yi Shen ¹ , Jianyu Guo ¹ , Ruili Ren ¹ , Zhangming Zhu ¹

Publication date (Print): April 2024

Journal: IEEE Transactions on Circuits and Systems I: Regular Papers

Publisher: Institute of Electrical and Electronics Engineers (IEEE)

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Most cited references 22

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Phase Noise and Jitter in CMOS Ring Oscillators

A.A. Abidi (2006)

0 comments Cited 51 times – based on 0 reviews      Review now

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A power-optimal repeater insertion methodology for global interconnects in nanometer designs

K. Banerjee, A Mehrotra (2002)

0 comments Cited 17 times – based on 0 reviews      Review now

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Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters

B Murmann, T. Sundstrom, C Svensson (2009)

0 comments Cited 17 times – based on 0 reviews      Review now

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Author and article information

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Haolin Han: (View ORCID Profile)

Shubin Liu: (View ORCID Profile)

Hongzhi Liang: (View ORCID Profile)

Yi Shen: (View ORCID Profile)

Zhangming Zhu: (View ORCID Profile)

Journal

Title: IEEE Transactions on Circuits and Systems I: Regular Papers

Abbreviated Title: IEEE Trans. Circuits Syst. I

Publisher: Institute of Electrical and Electronics Engineers (IEEE)

ISSN (Print): 1549-8328

ISSN (Electronic): 1558-0806

Publication date Created: April 2024

Publication date (Print): April 2024

Volume: 71

Issue: 4

Pages: 1495-1505

Affiliations

[1 ]Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Microelectronics, Xidian University, Xi’an, China

Article

DOI: 10.1109/TCSI.2024.3354995

SO-VID: ed8f300b-ff5a-48d8-bd1f-7ea2e720030f

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https://doi.org/10.15223/policy-029

https://doi.org/10.15223/policy-037

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A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC

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Most cited references 22

Phase Noise and Jitter in CMOS Ring Oscillators

A power-optimal repeater insertion methodology for global interconnects in nanometer designs

Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters

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