Timed SystemC Waiting–State Automata

System-Level Modeling using system-level languages like SystemC or SystemVerilog is gaining more and more popularity. They are supposed to provide the garantee of critical functional properties about the interaction between concurrent processes like determinism or liveness up to a basic unit, the delta-cycle. Additionnally to this functional correctness, system level models should also provide valuable information about important non-functional properties like time constraints. Since timing properties (execution times, delays, periods, etc.) are especially important in performance verification of multiprocessing real-time embedded systems [1], we propose a formal model based on SystemC waiting-state automata [2] that conforms to the SystemC scheduler up to delta-cycles (1) and that also conforms to the provided time constraints (2).

Content

Author and article information

Contributors

Nesrine Harrath

Bruno Monsuez

Conference

Publication date: July 2009

Publication date (Print): July 2009

Pages: 1-13

Affiliations

[0001]UEI, ENSTA, 32 Bd Victor, 75739 Paris cedex 15, France

Article

DOI: 10.14236/ewic/VECOS2009.7

SO-VID: 94cef2fe-3822-4ea7-b234-b0d6f4ee6f19

Copyright statement: © Nesrine Harrath et al. Published by BCS Learning and Development Ltd. Third International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2009), Rabat, Morroco

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This work is licensed under a Creative Commons Attribution 4.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/

Conference name: Third International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2009)

Conference acronym: VECOS

Conference number: 3

Conference location: Rabat, Morroco

Conference date: 2-3 July 2009

Conference sponsor: Electronic Workshops in Computing (eWiC)

Conference theme: Verification and Evaluation of Computer and Communication Systems (VECoS 2009)

Product

Product Information: 1477-9358BCS Learning & Development

Self URI (article page): https://www.scienceopen.com/hosted-document?doi=10.14236/ewic/VECOS2009.7

Self URI (journal page): https://ewic.bcs.org/

Timed SystemC Waiting–State Automata

Abstract