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      Using Sequence Diagrams to Specify and to Generate RTL Assertions

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      Fifth International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2011) (VECOS)

      Verification and Evaluation of Computer and Communication Systems (VECoS 2011)

      15-16 September 2011

      Sequence Diagrams, Formal Verification, Model-Checking, RTL, Assertions, Properties

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          Abstract

          In the field of hardware development, it is essential to prove the correctness of a new design. In order to check a design, verification engineers often use assertions written in a property or hardware specification language. Sequence diagrams are well established in the field of software engineering and allow easy and compact specification of protocols. We propose to use sequence diagrams to specify register transfer level (RTL) behaviour and present an approach to automatically generate temporal properties out of these diagrams. The validity of the approach is illustrated by verifying a Wishbone system-on-a-chip (SoC) local interconnect bus.

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          Author and article information

          Contributors
          Conference
          September 2011
          September 2011
          : 1-11
          Affiliations
          Computer Systems Group

          Technische Universität Darmstadt

          Merckstr. 25

          64283 Darmstadt

          Germanywww.rs.tu-darmstadt.de
          10.14236/ewic/VECOS2011.12
          © Martin Schweikert et al. Published by BCS Learning and Development Ltd. Fifth International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2011), Tunis, Tunisia

          This work is licensed under a Creative Commons Attribution 4.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/

          Fifth International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2011)
          VECOS
          5
          Tunis, Tunisia
          15-16 September 2011
          Electronic Workshops in Computing (eWiC)
          Verification and Evaluation of Computer and Communication Systems (VECoS 2011)
          Product
          Product Information: 1477-9358 BCS Learning & Development
          Self URI (journal page): https://ewic.bcs.org/
          Categories
          Electronic Workshops in Computing

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