September 2011
Fifth International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2011) (VECOS)
Verification and Evaluation of Computer and Communication Systems (VECoS 2011)
15-16 September 2011
Model checking, Büchi automata, LTL, temporal logic, translation, simplifications, implementation
Spot is a library of model-checking algorithms. This paper focuses on the module translating LTL formulæ into automata. We discuss improvements that have been implemented in the last four years, we show how Spot’s translation competes on various benchmarks, and we give some insight into its implementation.
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