A Customisable Multiprocessor for Application-Optimised Inductive Logic Programming

This paper describes a customisable processor designed to accelerate execution of inductive logic programming, targeting advanced field-programmable gate array (FPGA) technology. The instruction set and the microarchitecture of the processor are optimised for key operations in logic programming, such as unification and backtracking. Such optimisations reduce external memory access to enable performance comparable to current general-purpose processors, even at much lower clock frequencies. Our processor can be customised to a particular program by excluding unnecessary functional and memory units, and by adapting the size of such units to suit the application. These customisations reduce resource usage while improving performance, and enable accommodating multiple processors on a single FPGA. Such multiprocessor parallelism can be exploited by search-oriented applications in machine learning applications. We find that up to 32 processors can fit on an XC2V6000 FPGA. Using this device, the computational kernel of the machine learning system Progol, when applied to common bioinformatics data sets for learning to identify mutagenesis and protein folds, can yield speedups of up to 15 times over software running on a 2.53GHz Pentium-4 machine. The proposed approach appears promising with the advance of field-programmable technology: the more recent XC4VLX160 device would be capable of supporting up to 65 processors.

Content

Author and article information

Contributors

Andreas Fidjeland

Wayne Luk

Stephen Muggleton

Conference

Publication date: September 2008

Publication date (Print): September 2008

Pages: 319-330

Affiliations

[0001]Imperial College London, 180 Queen’s Gate, London SW7 2AZ, United Kingdom

Article

DOI: 10.14236/ewic/VOCS2008.27

SO-VID: 32eb8279-11ba-40c7-98f4-d995fc15d0fb

Copyright statement: © Andreas Fidjeland et al. Published by BCS Learning and Development Ltd. Visions of Computer Science - BCS International Academic Conference

License:

This work is licensed under a Creative Commons Attribution 4.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/

Conference name: Visions of Computer Science - BCS International Academic Conference

Conference acronym: VOCS

Conference number:

Conference location: Imperial College, London, UK

Conference date: 22 - 24 September 2008

Conference sponsor: Electronic Workshops in Computing (eWiC)

Conference theme: BCS International Academic Conference

Product

Product Information: 1477-9358BCS Learning & Development

Self URI (article page): https://www.scienceopen.com/hosted-document?doi=10.14236/ewic/VOCS2008.27

Self URI (journal page): https://ewic.bcs.org/

A Customisable Multiprocessor for Application-Optimised Inductive Logic Programming

Abstract