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      An 8.2 fJ/conversion-step 9-bit 135 MS/s SAR ADC with redundant methods for acceleration

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      Microelectronics Journal
      Elsevier BV

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          Journal
          Microelectronics Journal
          Microelectronics Journal
          Elsevier BV
          00262692
          March 2018
          March 2018
          : 73
          : 52-58
          Article
          10.1016/j.mejo.2017.12.014
          3ef96e63-bff8-488e-bdda-997f0cd7b198
          © 2018

          https://www.elsevier.com/tdm/userlicense/1.0/

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