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      Response time evaluation in Ethernet-based automation architectures

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      Second International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2008) (VECoS)
      Verification and Evaluation of Computer and Communication Systems
      2 - 3 July 2008
      Ethernet-based automation architectures, response time evaluation, Max-Plus algebra, timed event graphs (TEGs)
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            Abstract

            In this paper, a new method to evaluate the response time in switched Ethernet automation architectures is developed. It is based on the modeling of the whole system in the form of timed event graphs and on the resulting state representation in Max-Plus algebra. After the resolution of the state equations and their fusion according to the working of the system, we obtained an algorithm giving the reaction delay of the architecture. With deep analysis of these equations we got to analytical formulas for direct calculus of the response time as a function of the features of the architecture. The minimal and maximal bounds of response time are also calculated. To check the validity of the results, simulations of the algorithm and experimental measurements on a laboratory platform are used. Finally, a comparison with results obtained using a classical method, shows the interest and the effectiveness of this new approach.

            Content

            Author and article information

            Contributors
            Conference
            July 2008
            July 2008
            : 1-11
            Affiliations
            [0001]Lurpa ENS-Cachan, 61 av. Du Président Wilson, 94235 Cachan Cedex, France
            Article
            10.14236/ewic/VECOS2008.15
            72346027-a67c-465c-aa96-c6d4cb7c0bb9
            © B. Addad et al. Published by BCS Learning and Development Ltd. Second International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2008)

            This work is licensed under a Creative Commons Attribution 4.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/

            Second International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2008)
            VECoS
            Leeds, UK
            2 - 3 July 2008
            Electronic Workshops in Computing (eWiC)
            Verification and Evaluation of Computer and Communication Systems
            History
            Product

            1477-9358 BCS Learning & Development

            Self URI (article page): https://www.scienceopen.com/hosted-document?doi=10.14236/ewic/VECOS2008.15
            Self URI (journal page): https://ewic.bcs.org/
            Categories
            Electronic Workshops in Computing

            Applied computer science,Computer science,Security & Cryptology,Graphics & Multimedia design,General computer science,Human-computer-interaction
            Ethernet-based automation architectures,response time evaluation,Max-Plus algebra,timed event graphs (TEGs)

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