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      Hybrid 2D–CMOS microchips for memristive applications

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          Abstract

          Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry 1, 2 . However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm 2) devices on unfunctional SiO 2–Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm 2) interconnection 3 and as a channel of large transistors (roughly 16.5 µm 2) (refs.  4, 5 ), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during transfer increase variability and reduce yield. Here, we present the fabrication of high-integration-density 2D–CMOS hybrid microchips for memristive applications—CMOS stands for complementary metal–oxide–semiconductor. We transfer a sheet of multilayer hexagonal boron nitride onto the back-end-of-line interconnections of silicon microchips containing CMOS transistors of the 180 nm node, and finalize the circuits by patterning the top electrodes and interconnections. The CMOS transistors provide outstanding control over the currents across the hexagonal boron nitride memristors, which allows us to achieve endurances of roughly 5 million cycles in memristors as small as 0.053 µm 2. We demonstrate in-memory computation by constructing logic gates, and measure spike-timing dependent plasticity signals that are suitable for the implementation of spiking neural networks. The high performance and the relatively-high technology readiness level achieved represent a notable advance towards the integration of 2D materials in microelectronic products and memristive applications.

          Abstract

          High-integration-density 2D–CMOS hybrid microchips for memristive applications are made demonstrating in-memory computation and electrical response suitable for the implementation of spiking neural networks representing an advance towards integration of 2D materials in microelectronic products and memristive applications.

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          Most cited references25

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          Resistive switching in transition metal oxides

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            Artificial brains. A million spiking-neuron integrated circuit with a scalable communication network and interface.

            Inspired by the brain's structure, we have developed an efficient, scalable, and flexible non-von Neumann architecture that leverages contemporary silicon technology. To demonstrate, we built a 5.4-billion-transistor chip with 4096 neurosynaptic cores interconnected via an intrachip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses. Chips can be tiled in two dimensions via an interchip communication interface, seamlessly scaling the architecture to a cortexlike sheet of arbitrary size. The architecture is well suited to many applications that use complex neural networks in real time, for example, multiobject detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 63 milliwatts. Copyright © 2014, American Association for the Advancement of Science.
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              Memristive devices for computing.

              Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.
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                Author and article information

                Contributors
                mario.lanza@kaust.edu.sa
                Journal
                Nature
                Nature
                Nature
                Nature Publishing Group UK (London )
                0028-0836
                1476-4687
                27 March 2023
                27 March 2023
                2023
                : 618
                : 7963
                : 57-62
                Affiliations
                [1 ]GRID grid.45672.32, ISNI 0000 0001 1926 5090, Materials Science and Engineering Program, Physical Science and Engineering Division, , King Abdullah University of Science and Technology (KAUST), ; Thuwal, Saudi Arabia
                [2 ]GRID grid.12527.33, ISNI 0000 0001 0662 3178, Institute of Microelectronics, , Tsinghua University, ; Beijing, China
                [3 ]GRID grid.4643.5, ISNI 0000 0004 1937 0327, Department of Electronics, Information and Bioengineering, , Politecnico of Milan, ; Milan, Italy
                [4 ]GRID grid.6214.1, ISNI 0000 0004 0399 8953, Department of Thermal and Fluid Engineering, Faculty of Engineering Technology, , University of Twente, ; Enschede, the Netherlands
                [5 ]GRID grid.4711.3, ISNI 0000 0001 2183 4846, Institute of Micro and Nanotechnology, , IMN-CNM, CSIC (CEI UAM+CSIC), ; Madrid, Spain
                [6 ]GRID grid.263761.7, ISNI 0000 0001 0198 0694, Institute of Functional Nano and Soft Materials, Collaborative Innovation Center of Suzhou Nanoscience and Technology, , Soochow University, ; Suzhou, China
                [7 ]GRID grid.45672.32, ISNI 0000 0001 1926 5090, Computer, Electrical and Mathematical Sciences and Engineering Division, , King Abdullah University of Science and Technology, ; Thuwal, Saudi Arabia
                [8 ]GRID grid.4489.1, ISNI 0000000121678994, Department of Electronics and Computer Technology, Faculty of Sciences, , University of Granada, ; Granada, Spain
                [9 ]GRID grid.449751.a, ISNI 0000 0001 2306 0098, Department of Electrical Engineering and Media Technology, , Deggendorf Institute of Technology, ; Deggendorf, Germany
                [10 ]GRID grid.5329.d, ISNI 0000 0001 2348 4034, Institute for Microelectronics, , TU Wien, ; Vienna, Austria
                Author information
                http://orcid.org/0000-0002-7354-4530
                http://orcid.org/0000-0001-7793-1194
                http://orcid.org/0000-0001-5547-3380
                http://orcid.org/0000-0001-5207-1984
                http://orcid.org/0000-0003-1122-6497
                http://orcid.org/0000-0001-9237-4584
                http://orcid.org/0000-0002-7504-2147
                http://orcid.org/0000-0002-7828-0239
                http://orcid.org/0000-0003-1662-6457
                http://orcid.org/0000-0001-7625-1293
                http://orcid.org/0000-0002-3478-6414
                http://orcid.org/0000-0001-5029-2142
                http://orcid.org/0000-0001-6536-2238
                http://orcid.org/0000-0001-8359-7997
                http://orcid.org/0000-0002-1853-1614
                http://orcid.org/0000-0003-4756-8632
                Article
                5973
                10.1038/s41586-023-05973-1
                10232361
                36972685
                c5187d21-67d6-453d-aee2-2aa24957cd2b
                © The Author(s) 2023

                Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/.

                History
                : 4 March 2022
                : 17 March 2023
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                © Springer Nature Limited 2023

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                two-dimensional materials,electrical and electronic engineering
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                two-dimensional materials, electrical and electronic engineering

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