Papers:
P. Curzon & I. Leslie Improving Hardware Designs Whilst Simplifying their Proof http://dx.doi.org/10.14236/ewic/DCC1996.1
S. Hazelhurst & C-J. Seger An Integrated Approach to Verifying Large Circuits: A Case Study http://dx.doi.org/10.14236/ewic/DCC1996.2
J. He, G. Brown, W. Luk & J. O'Leary Deriving Two-Phase Modules for a Multi-Target Hardware Compiler http://dx.doi.org/10.14236/ewic/DCC1996.3
S. Hendricx & L. Claesen A Symbolic Modelling Approach for the Formal Verification of Integrated Mixed-Mode Systems http://dx.doi.org/10.14236/ewic/DCC1996.4
J. Hogg A Dynamic Hardware Generation Mechanism http://dx.doi.org/10.14236/ewic/DCC1996.5
Y. Liu & G. Birtwistle Specifying and Property Checking the AMULET1 Address Interface http://dx.doi.org/10.14236/ewic/DCC1996.6
W. Luk, F. Mang & C.S. Ng Serialising Heterogeneous and Non-Factorisable Processor Arrays http://dx.doi.org/10.14236/ewic/DCC1996.7
M. Mendler & M. Fairtlough Ternary Simulation: A Refinement of Binary Functions or an Abstraction of Real-Time Behaviour? http://dx.doi.org/10.14236/ewic/DCC1996.8
P.S. Miner & S.D. Johnson Verification of an Optimized Fault-Tolerant Clock Synchronization Circuit http://dx.doi.org/10.14236/ewic/DCC1996.9
I. Mitchell & M.R. Greenstreet Proving Newtonian Arbiters Correct, Almost Surely http://dx.doi.org/10.14236/ewic/DCC1996.10
O. Rasmussen Ensuring Correctness of Ruby Transformations http://dx.doi.org/10.14236/ewic/DCC1996.11
R. Reetz & T. Kropf Evaluating Possibilities for Formally Sound Simulation and Verification of VHDL http://dx.doi.org/10.14236/ewic/DCC1996.12
P. Sewell Design Rules and Abstractions (From Branching and Real Time) http://dx.doi.org/10.14236/ewic/DCC1996.13