A 14 bit 200 MS/s DAC With SFDR >78 dBc, IM3 < -83 dBc and NSD <-163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping

There is no author summary for this article yet. Authors can add summaries to their articles on ScienceOpen to make them more accessible to a non-specialist audience.

Related collections

Author and article information

Journal

Title: IEEE Journal of Solid-State Circuits

Abbreviated Title: IEEE J. Solid-State Circuits

Publisher: Institute of Electrical and Electronics Engineers (IEEE)

ISSN (Print): 0018-9200

ISSN (Electronic): 1558-173X

Publication date Created: June 2011

Publication date (Print): June 2011

Volume: 46

Issue: 6

Pages: 1371-1381

Article

DOI: 10.1109/JSSC.2011.2126410

SO-VID: 9f33a509-8d3e-49a9-8092-e8fc0e0fbaf2

History

Data availability:

Comments

Comment on this article

scite_

Cited by 6

See all cited by