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      Logic testing of bridging faults in CMOS integrated circuits

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          Most cited references21

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          Test pattern generation using Boolean satisfiability

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            Inductive Fault Analysis of MOS Integrated Circuits

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              Bridging and Stuck-At Faults

              K.C.Y. Mei (1974)
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                Author and article information

                Journal
                IEEE Transactions on Computers
                IEEE Trans. Comput.
                Institute of Electrical and Electronics Engineers (IEEE)
                00189340
                March 1998
                : 47
                : 3
                : 338-345
                Article
                10.1109/12.660170
                a12db4f3-9289-4fe3-9380-2eed8ef735a3
                © 1998
                History

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