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      Inductive Fault Analysis of MOS Integrated Circuits

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          Fault Modeling and Logic Simulation of CMOS and MOS Integrated Circuits

          R. L. Wadsack (1978)
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            Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability

            Galiay, Crouzet, Vergniault (1980)
            Article 0 comments Cited 33 times – based on 0 reviews     Review now
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              Modeling of Integrated Circuit Defect Sensitivities

              C. H. Stapper (1983)
              Article 0 comments Cited 25 times – based on 0 reviews     Review now
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                Author and article information

                Journal
                Title: IEEE Design & Test of Computers
                Abbreviated Title: IEEE Des. Test. Comput.
                Publisher: Institute of Electrical and Electronics Engineers (IEEE)
                ISSN (Print): 0740-7475
                Publication date Created: December 1985
                Publication date (Print): 1985
                Volume: 2
                Issue: 6
                Pages: 13-26
                Article
                DOI: 10.1109/MDT.1985.294793
                SO-VID: 22304840-ef6d-415e-9922-51ea2b9b1433
                Copyright © © 1985
                History

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