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      Scalable Manufacturing of Single Nanowire Devices Using Crack-Defined Shadow Mask Lithography

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          Abstract

          Single nanowires (NWs) have a broad range of applications in nanoelectronics, nanomechanics, and nanophotonics, but, to date, no technique can produce single sub-20 nm wide NWs with electrical connections in a scalable fashion. In this work, we combine conventional optical and crack lithographies to generate single NW devices with controllable and predictable dimensions and placement and with individual electrical contacts to the NWs. We demonstrate NWs made of gold, platinum, palladium, tungsten, tin, and metal oxides. We have used conventional i-line stepper lithography with a nominal resolution of 365 nm to define crack lithography structures in a shadow mask for large-scale manufacturing of sub-20 nm wide NWs, which is a 20-fold improvement over the resolution that is possible with the utilized stepper lithography. Overall, the proposed method represents an effective approach to generate single NW devices with useful applications in electrochemistry, photonics, and gas- and biosensing.

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          Most cited references57

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          Growth of nanowire superlattice structures for nanoscale photonics and electronics.

          The assembly of semiconductor nanowires and carbon nanotubes into nanoscale devices and circuits could enable diverse applications in nanoelectronics and photonics. Individual semiconducting nanowires have already been configured as field-effect transistors, photodetectors and bio/chemical sensors. More sophisticated light-emitting diodes (LEDs) and complementary and diode logic devices have been realized using both n- and p-type semiconducting nanowires or nanotubes. The n- and p-type materials have been incorporated in these latter devices either by crossing p- and n-type nanowires or by lithographically defining distinct p- and n-type regions in nanotubes, although both strategies limit device complexity. In the planar semiconductor industry, intricate n- and p-type and more generally compositionally modulated (that is, superlattice) structures are used to enable versatile electronic and photonic functions. Here we demonstrate the synthesis of semiconductor nanowire superlattices from group III-V and group IV materials. (The superlattices are created within the nanowires by repeated modulation of the vapour-phase semiconductor reactants during growth of the wires.) Compositionally modulated superlattices consisting of 2 to 21 layers of GaAs and GaP have been prepared. Furthermore, n-Si/p-Si and n-InP/p-InP modulation doped nanowires have been synthesized. Single-nanowire photoluminescence, electrical transport and electroluminescence measurements show the unique photonic and electronic properties of these nanowire superlattices, and suggest potential applications ranging from nano-barcodes to polarized nanoscale LEDs.
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            Growth of Arrayed Nanorods and Nanowires of ZnO from Aqueous Solutions

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              Nanowire transistors without junctions.

              All existing transistors are based on the use of semiconductor junctions formed by introducing dopant atoms into the semiconductor material. As the distance between junctions in modern devices drops below 10 nm, extraordinarily high doping concentration gradients become necessary. Because of the laws of diffusion and the statistical nature of the distribution of the doping atoms, such junctions represent an increasingly difficult fabrication challenge for the semiconductor industry. Here, we propose and demonstrate a new type of transistor in which there are no junctions and no doping concentration gradients. These devices have full CMOS functionality and are made using silicon nanowires. They have near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
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                Author and article information

                Journal
                ACS Appl Mater Interfaces
                ACS Appl Mater Interfaces
                am
                aamick
                ACS Applied Materials & Interfaces
                American Chemical Society
                1944-8244
                1944-8252
                30 January 2019
                27 February 2019
                : 11
                : 8
                : 8217-8226
                Affiliations
                Department of Micro and Nanosystems, School of Electrical Engineering and Computer Science, KTH Royal Institute of Technology , SE-10044 Stockholm, Sweden
                Author notes
                Article
                10.1021/acsami.8b19410
                6426283
                30698940
                aeb5b41a-baeb-4192-a8e1-1dc23d02c6c8
                Copyright © 2019 American Chemical Society

                This is an open access article published under an ACS AuthorChoice License, which permits copying and redistribution of the article or any adaptations for non-commercial purposes.

                History
                : 05 November 2018
                : 30 January 2019
                Categories
                Research Article
                Custom metadata
                am8b19410
                am-2018-194104

                Materials technology
                single nanowire devices,gold nanodevices,metal nanowires,self-aligned electrodes,shadow mask evaporation,crack lithography

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